Designing future chips

The current trend in computer processing chips is multi-core ... and I have written on this topic before.  But lets look at the design of these chips and the numbers involved.  First lets consider the designers - the skilled folk involved in this process.  Back in the 60's and 70's, there were probably around 5000 highly skilled engineers who could design chips, working for the main manufacturers of the first integrated circuits.  The advent of Application Specific Integrated Circuits (ASICs) probably took the numbers of designers to the next order (say 50000) and today's 'design' of Field Programmable Gate Array (FPGA) chips probably multiplies by the same factor again ... so about 500,000 people.  Further automation through hardware and software systems can extend the numbers to five million and it is conceivable in decades to come that altering the functions of chips will be possible by many people who have little or no familiarity with the technology itself!   Chips will eventually be self-analysing, self-repairing and programmed at extremely high abstraction levels.  

Secondly, lets look at the fabrication sizes.  Already the large manufacturers are talking about 32nm processes.  When it gets to 22nm, the smart money is on optical approaches.  By the time we reach 15nm it will be about economics even more ... (extreme ultraviolet may by then be less expensive than conventional optics).  And when the numbers get 'really small', at about 11nm, the wavelength of the light used will be bigger than the sizes of the features etched on the chip!   In such cases, the best guesses at present are the use of computational lithography to achieve the a profitable yield from the process.  

There aren't many companies on the planet today with the capability to build and run the manufacturing plant required for such processes. There may be even fewer who can cope with these future developments.